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39 #define FPU_RM_MASK 0x03
61 #define FPU_FLAGS_POS 2
63 #define FPU_ENABLE_POS 7
65 #define FPU_CAUSE_POS 12
67 #define FPU_CC0_POS 23
71 #define FPU_CC17_POS 25
73 #define FPU_FLAGS_MASK (0x1F << FPU_FLAGS_POS)
74 #define FPU_ENABLE_MASK (0x1F << FPU_ENABLE_POS)
75 #define FPU_CAUSE_MASK (0x3F << FPU_CAUSE_POS)
76 #define FPU_CC0_MASK (1 << FPU_CC0_POS)
77 #define FPU_FS_MASK (1 << FPU_FS_POS)
78 #define FPU_CC17_MASK (0x7F << FPU_CC17_POS)